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IAS0440_code_coverage_sv
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Commit
cf5b3d4d
authored
Mar 21, 2023
by
René
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23 deletions
calc_tb.sv
calc_tb.sv
View file @
cf5b3d4d
...
...
@@ -12,26 +12,6 @@ parameter OP_IDLE = 0, OP_ADD = 1, OP_SUB = 2, OP_MUL = 3, OP_DIV = 4;
CALC_logic
calc_dut
(
clk
,
rst
,
calc
,
A
,
B
,
OP
,
STATE_C
,
C
,
valid
)
;
covergroup
cg
@
(
posedge
clk
)
;
c1:
coverpoint
STATE_C
{
bins
S_IDLE
=
{
0
};
bins
S_ADD
=
{
1
};
bins
S_SUB
=
{
2
};
bins
S_MUL
=
{
3
};
bins
S_DIV
=
{
4
};
}
// c11: coverpoint STATE_C { option.auto_bin_max = 1; }
endgroup:
cg
covergroup
cg_lines
@
(
posedge
clk
)
;
//
bins
c_lines
[]
=
(
0
=>
"calc_logic.sv:37"
,
1
=>
"calc_logic.sv:38"
,
2
=>
"calc_logic.sv:39"
)
;
cov_lines:
coverpoint
c_lines
[
*
]
;
endgroup
cg
cover_inst
=
new
;
// instatiate the cover model
cg_lines
cover_lines
=
new
;
// instatiate the cover model
initial
begin
clk
=
0
;
end
...
...
@@ -95,9 +75,6 @@ initial begin
wait
(
valid
)
;
$
display
(
"Coverage: %.2f, %.2f"
,
cg
::
get_coverage
()
,
cover_inst
.
get_coverage
())
;
$
display
(
"Statement coverage: %.2f, %.2f"
,
cg_lines
::
get_coverage
()
,
cover_lines
.
get_coverage
())
;
$
stop
;
end
...
...
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